A display panel board used in a display device described in Japanese Unexamined Patent Application Publication No. 2011-151194 has been known. Such a display panel board includes a transparent substrate and films including gate lines, a gate insulation film, a semiconductor film (a channel section), a source conductive film (and a drain conductive film), an insulation film, and a transparent electrode film (a pixel electrode) that are disposed on the transparent substrate in this order.
In the above configuration, the semiconductor film is connected to the transparent electrode film via the drain conductive film. The insulation film is between the transparent electrode film and the drain conductive film. Therefore, a contact hole is necessary to be formed in the insulation film to connect the transparent electrode film and the drain conductive film. If the transparent electrode film and the semiconductor film are included in the same layer, the contact hole is not necessary to be formed and the number of processes can be reduced. However, in the configuration including the transparent electrode film and the semiconductor film in the same layer, the etching and the annealing performed on one of the films may adversely affect another one of the films.